1. Technical Field
Several aspects of the present invention relates to an image processing device for generating an image having a wide dynamic range with little blown out highlights and blocked up shadows by combining a plurality of images, which are shot while varying the exposure amount. Further, the invention relates to an electronic apparatus such as a drive recorder or a video camera for recording the image generated using such an image processing device.
2. Related Art
For example, the drive recorder is used for proving which driver is at fault or the like when a car accident occurs, and is therefore required to record a clear image. However, when shooting the vicinity of the end of a tunnel in daylight using the drive recorder, if the exposure amount is small, a bright object located outside the tunnel is shot clearly, but a dark object located inside the tunnel is shot in a state filled with black (blocked up shadows). In contrast, if the exposure amount is large, the dark object located inside the tunnel is shot clearly, but the bright object located outside the tunnel is shot in a state saturated to white (blown out highlights).
Therefore, it is possible to use the high dynamic range (HDR, also referred to as wide dynamic range (WDR)) composition in the drive recorder. The high dynamic range composition is a technique for generating an image (HDR image) having a wide dynamic range with little blown out highlights and blocked up shadows by shooting a plurality of images while varying the exposure amount and then combining the images (see, e.g., JP-A-2009-213032 (paragraphs 0006-0012) and JP-A-2007-329896 (paragraphs 0004-0009)). According to the high dynamic range composition, in the case in which the vehicle drives around the end of a tunnel or the case of backlight, an image with little blown out highlights and blocked up shadows can be obtained.
In the related art, the HDR image is generated by once storing the image data, which represents a plurality of images obtained by performing shooting with imaging element while varying the exposure time, in a frame memory, and then combining the image data, which is read out from the frame memory, in the HDR image processing circuit. Therefore, the amount of image data stored in the frame memory, and the transmission band (the transmission bit rate) of the image data to be transmitted between the HDR image processing circuit and the frame memory increase in accordance with the number of the images different in exposure time from each other.
As a related technology, there is disclosed in JP-A-2006-14117 (abstract) a physical information acquisition method capable of achieving a frame rate equivalent to that in the normal operation and low power consumption in an imaging device having a dynamic range expansion processing function. In this physical information acquisition method, in an area composed of a plurality of lines (horizontal rows) contiguous in a vertical column direction out of the entire imaging range in a solid-state imaging element, the area is divided into a plurality of (e.g., three) regions in the vertical column direction, and some (e.g., a region B) of the regions is treated as a valid region having a contribution to the dynamic range expansion process, and then a plurality of image signals are obtained at the same processing speed as the processing speed at which the processing object signals are obtained from the entire detection region under the conditions different in exposure time from each other using the region B. However, according to JP-A-2006-14117 (abstract), it results that the image signals are obtained from only a part of the detection region in the solid-state imaging element.
In view of such circumstances, there is a high probability that the amount of the image data to be transferred between the HDR image processing circuit and the frame memory and the transmission bit rate thereof are the bottleneck for achieving further expansion of the dynamic range of the HDR image, a higher resolution thereof, or a higher frame rate thereof.
If the storage capacity of the frame memory is increased, the frequency of the transfer clock signal is raised, or the width of the bus line of the frame memory is increased in order to eliminate the bottleneck, increase in cost is incurred, which makes it difficult to realize such improvement items as described above. Further, also in the case in which it is attempted that the HDR image processing circuit is incorporated in a system-on-chip together with a posterior system, a problem or a restriction on the memory capacity or an internal bus frequency occurs when integrating the frame memory for the HDR composition and the memory of the posterior system.